Summary of PCB Wiring Methods

When designing a PCB, the wiring process is essential, and the rationality of the wiring also determines the aesthetics and production cost of the PCB. At the same time, it can also reflect the performance of the circuit and heat dissipation, as well as whether the performance of the device can be optimized. This Gold Phoenix PCB Knowledge Center article provides a comprehensive summary of PCB wiring methods.

1. The wiring length should include the length of the through‑hole and encapsulated solder pads.

2. The preferred wiring angle is the 135° angle wiring method. Any angle wiring may cause process problems in board fabrication.

3. Avoid wiring at right or sharp angles, which may cause changes in line width and impedance at corner positions, resulting in signal reflection.

4. The wiring should be led out from the long direction of the solder pad, avoiding the wide direction or the four corners of the solder pad. It is advisable to have the corners of the wiring at least 6 mil away from the position of the solder pad.

5. Adjacent pads connected to the same network cannot be directly connected. It is necessary to first connect the pads before proceeding with the connection, as direct connection can easily lead to solder bridging during manual soldering.

6. For small chip‑scale devices, attention should be paid to the symmetry of the wiring, and the wiring width at both ends should be consistent. For example, if one pin is coated with copper, the other pin should also be coated with copper as much as possible to reduce device drift and rotation after component placement.

7. For signals with grounding requirements, the integrity of the grounding must be ensured, and GND vias should be drilled on the grounding line as much as possible. The distance between two GND vias should not be too far and should be kept around 50–150 mil as much as possible.

8. The routing should have a complete and continuous reference layer plane to avoid high‑speed signals crossing zones. It is recommended that high‑speed signals be at least 40 mils away from the edge of the reference plane.

9. Due to the decrease in impedance caused by surface mount device pads, it is recommended to excavate a reference layer directly below the surface mount pad according to its size to reduce the impact of impedance discontinuities. Common surface mount devices include capacitors, ESD protection devices, common‑mode suppression inductors, and connectors.

10. The area of the loop formed by the signal line and its return path should be as small as possible. A small loop area minimizes external radiation and interference.

11. Stubs are not allowed in wiring, and the length of stubs should be minimized as much as possible. It is recommended that the length of stubs be zero. To avoid the effect of through‑hole stubs, especially when the stub length exceeds 12 mils, it is recommended to evaluate the impact of through‑hole stubs on signal integrity through simulation.

12. Try to avoid forming self‑loops in different layers of wiring. This type of problem is prone to occur in multi‑layer board design, as the self‑loop will cause radiation interference.

13. It is recommended not to place test points on high‑speed signals.

14. For signals that may cause interference or sensitivity (such as radio frequency signals), a shielding cover must be planned. The width of the shielding cover is usually 40 mils (generally maintained at 30 mils or more), and as many GND through‑holes as possible should be drilled on the shielding cover to increase its effectiveness.

15. The wiring width of the same network should be consistent. Changes in line width can cause uneven impedance characteristics of the line, and reflection may occur when the transmission speed is high. Under certain conditions, such as plug‑in leads and BGA packaged lead wires with similar structures, it may not be possible to avoid changes in line width due to small spacing. Therefore, the effective length of the inconsistent part in the middle should be minimized as much as possible.

16. The line width of the IC pin output should be less than or equal to the width of the solder pad, and the line width cannot be larger than the width of the solder pad. For some signals with wider line width due to current carrying requirements, the wiring can first maintain consistency with the pin width. After the wiring leads out of the solder pad, the line width can be thickened by about 6–10 mil.

17. The wiring must be connected to the center of the solder pad and through‑hole.

18. For high‑voltage signals, the creepage distance must be ensured.

19. If the design includes multiple DDR or other memory chips, it is necessary to confirm the wiring topology and whether there are reference design documents.

20. The gold finger area needs to be treated with full openings. When designing multi‑layer boards, all layers of copper below the gold finger should be hollowed out, and the distance between the hollowed‑out copper and the board edge is generally more than 3 mm.

21. The routing should be planned in advance for bottleneck locations of the channel, and the routing capacity at the narrowest point of the channel should be reasonably planned.

22. Place the coupling capacitor as close to the connector as possible.

23. The series resistor should be placed close to the transmitting device, and the termination resistor should be placed close to the receiving end. For example, the series resistor on the eMMC clock signal is recommended to be placed near the CPU side (within 400 mil).

24. It is recommended to drill one through‑hole on each of the ground pads of ICs (such as eMMC, FLASH, etc.) to effectively shorten the return current path.

25. It is recommended to drill a ground through‑hole on each ground pad of ESD devices, and the through‑hole should be as close as possible to the pad.

26. Avoid wiring around clock devices (such as crystals, oscillators, clock generators, clock distributors), switching power supplies, magnetic devices, and plug‑in via holes.

27. When the wiring changes layers and the reference layer before and after the layer change is the ground plane, an accompanying through‑hole needs to be placed next to the signal through‑hole to ensure the continuity of the return current path. For differential signals, both signal through‑holes and return through‑holes should be symmetrically placed. For single‑ended signals, it is recommended to place a return via next to the signal via to reduce crosstalk between vias.

28. The distance between the copper of the connector and the signal pad should be at least three times the line width.

29. Connect with wiring or perform pad cutting at the plane disconnection point in the BGA area to avoid damaging the integrity of the plane.

30. When PCB wiring requires grounding treatment, the recommended grounding method is as follows. In the figure below, L is the spacing between the grounding holes of the grounding wire; D is the distance between the ground wire and the signal line, and it is recommended to be ≥ 4 × W.